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Signal Integrity Engineer

Cerebras

Cerebras

Santa Clara, CA, USA
Posted 6+ months ago
Signal Integrity and Power Integrity Engineer Responsibilities:

* Lead pre-layout and post-layout simulation flow with a focus on high-speed interface and PDN, create simulation models and develop simulation methodology for SIPI design

* Lead SIPI validation methodology and develop detailed engineering test plans

* Model and optimize SI channel for PCBA, FPGA and ASIC on POD12 SE and SerDes interface standards

* Validate high speed interface and PDN impedance in lab to correlate simulation results and improve design flow

* Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems

* Work with EE Board and Power design engineers, and ASIC design and verification engineers in collaborative cross functional teams to achieve project objectives

* Support multiple projects at the same time


Minimum Requirements

* MS EE or equivalent

* 5+ years of relevant SI/PI work experience in IT, HPC and/or AI hardware accelerator systems design